MACAU CAPITAL INVESTMENTS, INC.
Previous company name
SILICON VALLEY RESEARCH, INC.
Name change date
Macau Capital Investments, Inc., formerly known as Silicon Valley Research, Inc., is an American private company engaged in the development and marketing of electronic design automation software for use by integrated circuit (IC) designers to create the physical design of their ICs. The company was incorporated in the year 1979. The registered head office of the company is located in San Jose, California.
Macau Capital Investments’ products include a complete, automatic place and route solution, including floorplanning, placement, and routing products. The company also provides a comprehensive set of design project support services encompassing nearly all aspects of the IC development process, including cell-based APR, FPGA to Gate Array conversion, custom analog and digital layout and chip assembly capability, and CAD/EDA tool application methodology consulting services. The company markets its products both domestically and internationally to integrated circuit designers and manufacturers; large electronic systems manufacturers; and aerospace, automotive, and consumer electronics companies.
Macau Capital Investments Inc, formerly Silicon Valley Research, Inc. (SVR), designs, develops and markets a series of advanced computer-aided design (CAD) software products for use by electronic engineers in the design and engineering of integrated circuits (ICs). The Company’s software products include SVR QIC/APR, SVR GARDS, SVR SC and SVR FloorPlacer. The Company also provides the IC design industry with a comprehensive set of design project support services encompassing nearly all aspects of the IC development process, including complete IC design engineering services, VLSI (very large-scale integration) mask design and chip assembly capability and CAD/electronic design automation (EDA) tool application methodology consulting services.
Description and history
Macau Capital Investments Inc, formerly Silicon Valley Research, Inc. (SVR), incorporated in 1979, designs, develops and markets a series of advanced computer-aided design (CAD) software products for use by electronic engineers in the design and engineering of integrated circuits (ICs). The Company’s software products include SVR QIC/APR, SVR GARDS, SVR SC and SVR FloorPlacer. The Company also provides the IC design industry with a comprehensive set of design project support services encompassing nearly all aspects of the IC development process, including complete IC design engineering services, VLSI (very large-scale integration) mask design and chip assembly capability and CAD/electronic design automation (EDA) tool application methodology consulting services.
All of the Company’s products run on Unix workstations from Sun Microsystems, Inc. and Hewlett Packard Company, as well as on the Linux operating system. All of its products also support industry standards such as Motif, X-Windows, GDSII Stream format, EDIF (electronic data interchange format), Verilog, LEF (library exchange format) and DEF (data exchange format). In addition, the Company has ported two of its products, QIC/APR and GARDS, to operate on the Red Hat version of the Linux operating system running on X86 workstations. The Company offers interfaces to Mentor Graphics Falcon Framework and Synopsys, Inc.’s synthesis tools, as well as Cadence’s physical design tools. Its products have a similar technology foundation and are modular in nature. Each of the products offered by the Company is sold in a range of configurations based on the size and complexity of the design to be developed with the SVR product.
The Company markets its products both domestically and internationally to IC designers and manufacturers, large electronic systems manufacturers and major aerospace, automotive and consumer electronics companies. Its end use customers include Hyundai, Micron, Motorola, N.E.C., OKI Semiconductor, Prominent Communications, Samsung Electronics, Sarnoff, Sony, Texas Instruments and Yamaha.
SVR QIC/APR is the Company’s latest product offering. QIC/APR is the combined offering of Design Cockpit Platform (DCP), QICPlace and QICRoute. QIC/APR offers all of the features of the combined products in one comprehensive package.
SVR DCP is a next-generation framework for tool integration. SVR DCP combines an extensible database with a modular plug-in architecture to provide a generic engine for VLSI design automation. Database viewers, file format support and complete interfaces to external tools such as QICPlace and QICRoute are specified as plug-ins. SVR DCP is controlled through a graphical user interface that gives it advanced editing capabilities suitable for floorplanning, full-custom layout, placement modification and route editing. Customers may use SVR DCP’s standard scripting language, Perl, to modify and customize the tool according their design flow needs.
SVR QICPlace is a stand-alone placement engine based on the placement subsystem of SVR GARDS. It uses its timing-driven MinCut algorithm to produce high-density results. SVR QICPlace provides design flexibility by transparently supporting non-rectangular placement areas and cells. For designs with sensitive timing budgets, SVR QICPlace’s accurate clock-tree synthesis minimizes the skew of critical paths. SVR QICPlace plugs seamlessly into SVR DCP for complete interactive control.
SVR QICRoute is the Company’s next-generation routing solution, combining the speed and efficiency of SVR GARDS routing subsystem with new features for deep submicron design. SVR QICRoute’s pin-pair routing gives designers precise control over timing-critical nets. Timing violations can also be automatically eliminated using SVR QICRoute’s MeetSkew routing algorithm. Although the line-probe routing algorithm consistently delivers high-quality routing results, SVR QICRoute can optionally be guided by global-routing information. As with SVR QICPlace, SVR QICRoute is tightly integrated with SVR DCP through a sophisticated plug-in interface.
SVR GARDS, using its line probe routing algorithm, provides fast turnaround time, as well as high-quality routing results with a minimum of vias, line segments and total interconnecting wire length. The product handles up to a million gates and has been extended to handle n layers of interconnect. The interactive timing-driven placement subsystem enables designers to improve their placement to handle issues of congestion, timing or net length. The timing-driven routing capabilities of the product allow designers to specify timing constraints on all nets and on all critical paths, without affecting run times. SVR GARDS has a built-in simulator for timing analysis and a clock tree synthesis module that minimizes clock delay. SVR GARDS includes a procedural language interface that allows system designers to interface the tool to virtually any design flow. The line probe routing algorithms enable the product to perform incremental ECOs rapidly without disturbing the structure of the routed design outside the region of interest.
SVR SC is a channel-based router for the automatic place and route of standard cell-based IC’s. SVR SC provides two to four layers routing for fixed and variable height and width standard cells. Routing over cells and blocks is supported on all layers. SVR SC provides efficient floorplanning, placement and routing of standard cells, macro blocks and mixed block and cell designs. Advanced features such as row flipping and power rail sharing allow designers to create designs with fewer channels and thus reduced die size. Timing-driven placement and routing capabilities are integrated into the product to assist designers in creating designs that function according to their specification.
SVR FloorPlacer is an interactive floorplanning software product for designers of embedded arrays, gate arrays and structured custom blocks. By integrating its area-based routing technology, SVR FloorPlacer helps designers obtain an accurate assessment of timing characteristics and routability of their designs early in the design process. SVR FloorPlacer reduces time to market by eliminating costly iterations between synthesis and layout. The software products provide interfaces and links, which allow direct back annotation of delays from SVR FloorPlacer products into synthesis and simulation. The graphical user interface provides improved usability and gives the user interactive control over the floorplan while providing comprehensive graphical analysis and feedback. This interface helps users improve routability and the timing attributes of their designs.
IC Design and Consulting Services
The Company provides a set of design project support services focused mainly on the physical design portion of the IC development process, including complete physical design engineering services, VLSI mask design and chip assembly capability and CAD/EDA tool application methodology consulting services. Design capabilities include standard cell library layout and verification, hierarchical chip floorplanning, full custom internal-block layout, standard-cell-block place-and-route implementation and top-level place and route chip assembly. As an integrated EDA tool supplier and IC design and layout organization, the Company also provides consulting in the areas of high-level design methodology, EDA tool application and integration, customized environments and need-specific tool enhancements.
The Company faces competition from EDA vendors, including Cadence, Avant! and Synopsys.
Formerly known as Silicon Valley Research, Inc
Engaged in the development and marketing of electronic design automation software for use by integrated circuit (IC) designers to create the physical design of their ICs
MOSS ADAMS LLP
US SIC Code
100, Park Avenue
City province or state postal code
10017, NEW YORK, NY
Phone: +1 786 473 3275
Country address: UNITED STATES OF AMERICA